Some Concepts
AMAT: Average memory access time. \(AMAT = t_{hit} + rate_{missed} * penalty_{missed}\)
Cache Miss
Sources of Cache Misses:
- Compulsory: (Like cold start, process migration, 1st reference)
- Capacity
- Conflict (Collison)
The Design Solutions:
- Compulsory:
- Increase block size
- Capacity:
- Increase cache size
- Conflict:
- Increase associativity (may increase hit-time)
Miss Penalty
Factors:
- How big is your memory architecture
- How big is your block size
Multiple Cache Levels
To minimize AMAT, we need to adjust the type/parameters of cache. But it's hard to reduce hit time, miss rate and miss penalty at once.
Multiple Cache Levels resolves this.
In general, L1 focuses on low hit time, L2,L3 focus on low miss rate. However, there is also big write back cost for such design.
The Cache Design Space
- Cache parameters
- Policy choices (Rewrite, Replacement)
- Optimal choice is a compromise
- Simplicity often wins